connectors 03/21/11 specifications and applications information page 1 of 5. the erg smart force series smart force series smart force series smart force series smart force series of led drivers are specifically designed for applications which require wide dimming and lcd brightness stability over a wide input voltage range. the SFD2EB3893F is designed to provide backlight power for the sharp lq150x1lg82 display. designed, manufactured and supported within the usa, the sfd2e features: ? 10 mm or less in height ? wide input voltage range ? constant led current ? external dimming or on-board dimming ? high dimming ratio ? soft start ? one year warranty j1-1 vin(+) j1-2 vin(+) j1-3 vin(+) j1-4 gnd j1-5 gnd j1-6 gnd j1-7 enable j1-8 control output connector * molex 53261-1271 smar smar smar smar smar t f t f t f t f t f or or or or or ce led ce led ce led ce led ce led driver driver driver driver driver input connector molex 53261-0871 package configuration mass: 18 grams typ. j2-1 cathode 1 j2-7 (do not use) j2-2 anode 1 j2-8 (do not use) j2-3 (do not use) j2-9 cathode 3 j2-4 (do not use) j2-10 anode 3 j2-5 cathode 2 j2-11 (do not use) j2-6 anode 2 j2-12 (do not use) SFD2EB3893F pcb components are shown for reference only. actual product may differ from that shown. 1 output .125 [3,18] dia. (2x) 2.105 [53,47] .700 [17,79] .145 [3,68] input 1.115 [28,32] 4.585 [116,5] .830 [21,08] 1 * requires harness: erg part number h12406152 recommended
page 2 of 5. s g n i t a r m u m i x a m e t u l o s b a g n i t a rl o b m y se u l a vs t i n u e g n a r e g a t l o v t u p n i v n i 0 . 0 2 + o t 3 . 0 -c d v e r u t a r e p m e t e g a r o t s t g t s 5 8 + o t 0 4 - o c e g a t l o v t u p n i e l b a n e v e l b a n e n i v o t 0c d v e g a t l o v t u p n i l o r t n o c v m w p 0 . 5 + o t 0c d v s c i t s i r e t c a r a h c g n i t a r e p o 5 2 = a t d n a c d s t l o v 0 0 . 2 1 = n i v d e t o n e s i w r e h t o s s e l n u o . c c i t s i r e t c a r a h cl o b m y sn i mp y tx a ms t i n u e g a t l o v t u p n i v n i 8 . 0 1 +0 . 2 1 +0 . 8 1 +c d v e c a f r u s t n e n o p m o c e r u t a r e p m e t ) 1 e t o n ( t s 0 4 --0 8 + o c t n e r r u c h s u r n i k a e p ) 2 e t o n ( i k a e p -1 . 1- c d a t n e r r u c t u p n i i n i 9 7 . 03 9 . 07 0 . 1c d a e g a t l o v g n i r t s d e lv d e l 2 . 7 2-8 . 6 3c d v y c n e i c i f f e ) 3 e t o n ( h h h h h -4 8-% ) g n i r t s r e p ( t n e r r u c t u p t u oi t u o 3 98 93 0 1c d a m n i p e l b a n e d l o h s e r h t n o - n r u t v n o h t -- 0 . 2c d v d l o h s e r h t f f o - n r u t v f f o h t 8 . 0-- c d v e c n a d e p m i t u p n i e l b a n e ) 4 e t o n ( r e l b a n e -0 . 5- s m h o k n i p l o r t n o c ) 6 , 5 s e t o n ( d l o h s e r h t n o - l l u f v n o h t -0 . 1- c d v d l o h s e r h t f f o - l l u f v f f o h t -5 . 4- c d v t n e r r u c s a i b t u p n i l o r t n o c i s a i b c -- 0 1a u y c n e u q e r f f m w p -5 4 2-z h SFD2EB3893F specifications subject to change without notice. note 1 surface temperature must not exceed 80 c. note 2 peak inrush occurs over a 1 to 3 ms time period during initial startup. note 3 efficiency is calculated using a 32v led string. note 4 enable pin input impedance is 5.0k to 2.5v. note 5 control pin is internally pulled up above the turn-on threshold. note 6 control pin input impedance is 485k .
page 3 of 5. application information the erg SFD2EB3893F has been designed to be configured in multiple ways: no dimming ? operation: the sfd2e can be configured to operate without dimming by floating the control (j1-8) pin. ? pins 1, 2 and 3 of connector j1 must be connected to +vin, between 10.8 and 18 vdc. pins 4, 5 and 6 of connector j1 must be connected to gnd. ? enable pin (j1-7) must be high for driver to be on. onboard pwm dimming ? operation: onboard pwm configuration as shown in figure 1 allows the user to control display brightness by controlling the onboard pwm generator. the user is responsible to provide an analog control signal. a minimum pulse width of 80 s is possible with this configuration. ? dimming: dimming is accomplished by applying an analog voltage to the control pin (j1-8). display brightness is modulated by controlling the control pin voltage as shown in graph 1. ? enable/disable: the driver may be enabled or disabled (turned on and off) by applying a dc voltage to the enable pin(j1-7). enable pin on and off levels are specified in the operating characteristics section of the data sheet. ? pins 1, 2 and 3 of connector j1 must be connected to +vin, between 10.8 and 18 vdc. pins 4, 5 and 6 of connector j1 must be connected to gnd. external pwm dimming ? operation: external pwm configuration as shown in figure 2 allows the user to control display brightness with an externally generated pwm signal. the user is responsible to provide the pwm signal. a minimum pulse width of 80 s is possible with this configuration. ? dimming: dimming is accomplished by applying a pwm signal to the enable pin (j1-7). enable on and off levels are specified in the operating characteristics section of the data sheet. display brightness is modulated by controlling the pwm duty cycle as shown in graph 2. ? pins 1 through 3 of connector j1 must be connected to +vin, between 10.8 and 18 vdc. pins 4 through 6 of connector j1 must be connected to gnd. SFD2EB3893F
page 4 of 5. SFD2EB3893F graph 1 onboard pwm dimming figure 1 vin gnd control enable cathode 1 j2 +12v gnd vin analog dimming voltage (0 to 5v) j1 1,2,3 4,5,6 8 7 cathode 2 anode 1 +on -off optional potentiometer 1,2,3 4,5,6 anode 2 cathode 3 anode 3
page 5 of 5. SFD2EB3893F u l ? r e g i s t e r e d f i r m r e g i s t e r e d f i r m e n d i c o t t r e s e a r c h g r o u p , i n c . i s o 9 0 0 1 a 3 3 1 3 endicott research group, inc. (erg) reserves the right to make changes in circuit design and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnished by erg is believed to be accurate and reliable. however, no responsibility is assumed by erg for its use. graph 2 figure 2 control enable j2 +12v gnd vin j1 1,2,3 4,5,6 8 7 external pwm dimming (1) (1) nonlinear relationship from 0 to 2% duty cycle. 5v 0v duty cycle 0% - 100% anode 1 cathode 1 cathode 2 anode 2 cathode 3 anode 3
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